EPM3256AQC208-10 vs EPM3256AQC208-10N 对比

详细并排对比 EPM3256AQC208-10 出自 Altera 和 EPM3256AQC208-10N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM3256AQC208-10 EPM3256AQC208-10N
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $15.20 $4.62
Family MAX 3000A —
Logic Family CMOS (EEPROM-based) —
Macrocells 256 —
Usable Gates 5,000 10,000
User I/Os 161 —
引脚数 208 —
封装 208-BFQFP (PQFP, Gull Wing) —
Pin-to-Pin Propagation Delay 10 ns —
Counter Frequency (max) 227.3 MHz —
Supply Voltage (VCCINT) 3.3 V —
I/O Tolerance MultiVolt 2.5 V / 3.3 V / 5.0 V tolerant 5 V tolerant, MultiVolt interface
Programming Interface IEEE 1149.1 JTAG (ISP) —
工作温度 0 °C to +70 °C (Commercial) 0C to +70C (Commercial)
PCI-SIG Compliance Yes (speed grades -4, -5, -6, -7, -10) —
Global Clock Networks 4 (CLK, CLR, OE, GCLK) —
安装类型 Surface Mount Surface Mount
RoHS 状态 [DATA_NEEDED: RoHS status] [DATA_NEEDED: lead-free status - non-RoHS suffix 'N' typically indicates lead-free finish, but datasheet not present in data]
Series — MAX 3000A
Programmable Type — In-System Programmable (EEPROM)
Number of Macrocells — 256
Number of Logic Elements/Blocks — 16 LABs
Number of I/O Pins — 161 (158 user I/O per Arrow listing)
Propagation Delay (tpd) — 10 ns (max)
Maximum Counter Frequency — 227.3 MHz
Supply Voltage - Internal — 3.0 V to 3.6 V (3.3 V typical)
封装 / 外壳 — 208-BFQFP / 208-PQFP (28x28 mm)
ISP Compliance — IEEE Std. 1532
Boundary Scan — IEEE Std. 1149.1 (JTAG)

数据手册与资源

浏览全部产品 创建 BOM 获取报价