EPM3256AQC208-10 vs EPM3256AT1144-10S 对比

详细并排对比 EPM3256AQC208-10 出自 Altera 和 EPM3256AT1144-10S 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM3256AQC208-10 EPM3256AT1144-10S
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 不推荐新设计
库存状态 有库存 有库存
单价(USD) $15.20 $21.30
Family MAX 3000A MAX 3000A
Logic Family CMOS (EEPROM-based) —
Macrocells 256 256
Usable Gates 5,000 —
User I/Os 161 —
引脚数 208 —
封装 208-BFQFP (PQFP, Gull Wing) TQFP-144
Pin-to-Pin Propagation Delay 10 ns —
Counter Frequency (max) 227.3 MHz —
Supply Voltage (VCCINT) 3.3 V —
I/O Tolerance MultiVolt 2.5 V / 3.3 V / 5.0 V tolerant —
Programming Interface IEEE 1149.1 JTAG (ISP) —
工作温度 0 °C to +70 °C (Commercial) 0C to +85C (commercial)
PCI-SIG Compliance Yes (speed grades -4, -5, -6, -7, -10) —
Global Clock Networks 4 (CLK, CLR, OE, GCLK) —
安装类型 Surface Mount Surface Mount
RoHS 状态 [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS compliance status]
Device Type — CPLD (Complex Programmable Logic Device)
Logic Array Blocks (LABs) — 16
Maximum User I/O Pins — 212
Pin-to-Pin Delay (tPD) — 10 ns
Supply Voltage - Core — 3.3 V
I/O Voltage Support — 2.5V / 3.3V / 5.0V MultiVolt
Programmable Interconnect — EEPROM-based, non-volatile
In-System Programming — Yes, via IEEE 1149.1 JTAG
Configuration Cells — EEPROM (instant-on, no external PROM)

数据手册与资源

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