EPM3256AQC208-10N vs EPM3256AQC208-7 对比

详细并排对比 EPM3256AQC208-10N 出自 Altera 和 EPM3256AQC208-7 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM3256AQC208-10N EPM3256AQC208-7
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 有效
库存状态 有库存 有库存
单价(USD) $4.62 $17.20
Series MAX 3000A MAX 3000A
Programmable Type In-System Programmable (EEPROM) In-System Programmable (EEPROM)
Number of Macrocells 256 256
Number of Logic Elements/Blocks 16 LABs —
Usable Gates 10,000 —
Number of I/O Pins 161 (158 user I/O per Arrow listing) 158 - 161
Propagation Delay (tpd) 10 ns (max) 7.5 ns max
Maximum Counter Frequency 227.3 MHz 126.6 MHz
Supply Voltage - Internal 3.0 V to 3.6 V (3.3 V typical) 3.0 V to 3.6 V (3.3 V nominal)
工作温度 0C to +70C (Commercial) 0 °C to 70 °C (Commercial)
封装 / 外壳 208-BFQFP / 208-PQFP (28x28 mm) 208-BFQFP (PQFP-208, 28x28 mm)
安装类型 Surface Mount Surface Mount
ISP Compliance IEEE Std. 1532 —
Boundary Scan IEEE Std. 1149.1 (JTAG) —
I/O Tolerance 5 V tolerant, MultiVolt interface —
RoHS 状态 [DATA_NEEDED: lead-free status - non-RoHS suffix 'N' typically indicates lead-free finish, but datasheet not present in data] —
Manufacturer — Altera (now Intel FPGA)
Number of Logic Elements / Blocks — 16 LABs
Number of Usable Gates — 5,000
I/O Logic Level Compatibility — 5.0 V / 3.3 V / 2.5 V (MultiVolt)
Supplier Device Package — 208-PQFP
ISP Standard — IEEE Std. 1532
Process Technology — CMOS EEPROM
Product Status — Active (legacy line)

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