EPM3256ATC144-7 vs EPM3512ATC144 对比
详细并排对比 EPM3256ATC144-7 出自 Altera 和 EPM3512ATC144 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM3256ATC144-7 | EPM3512ATC144 |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价(USD) | $17.06 | $8.75 |
| Family | MAX 3000A | MAX 3000A |
| Macrocells | 256 | 512 |
| User I/Os | 116 | — |
| Logic Elements / Gates | 600 to 10,000 usable gates | — |
| Propagation Delay (tPD) | 7.5 ns | [DATA_NEEDED: tPD in ns] |
| Counter Frequency (fCNT) | 227.3 MHz | — |
| Speed Grade | -7 | — |
| Supply Voltage - Core (VCCINT) | 3.3 V | — |
| Supply Voltage - I/O (VCCIO) | 2.5 V / 3.3 V / 5.0 V | — |
| In-System Programming | IEEE Std. 1532 compliant, 3.3 V ISP | — |
| 封装 | TQFP-144 (LFQFP, gull-wing) | TQFP-144 (20x20 mm) |
| 工作温度 | 0C to +70C (Commercial) | 0C to +70C (commercial) |
| 引脚数量 | 144 | — |
| 安装类型 | Surface Mount | Surface Mount |
| PCI Compliance | PCI Local Bus Specification Revision 2.2 (speed grades -4 to -10) | — |
| JTAG Support | IEEE Std. 1149.1 boundary-scan | — |
| Logic Array Blocks (LABs) | — | 16 |
| Maximum User I/O Pins | — | 212 |
| Core Supply Voltage | — | 3.3 V |
| Programming Technology | — | EEPROM (in-system programmable) |
| JTAG Interface | — | IEEE Std. 1149.1 (4-pin) |
| Maximum Frequency | — | 116 MHz |
| Product Terms per Macrocell | — | 32 (expandable) |
| I/O Standards | — | LVTTL, LVCMOS, 2.5 V/3.3 V/5 V tolerant |
| MSL 等级 | — | 3 |
| RoHS 状态 | — | Compliant (lead-free suffix variants available) |