EPM3512AFC256-19 vs EPM3512AFC256-21 对比
详细并排对比 EPM3512AFC256-19 出自 Altera 和 EPM3512AFC256-21 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM3512AFC256-19 | EPM3512AFC256-21 |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $10.85 | $18.75 |
| Family | MAX 3000A | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 512 | — |
| Usable Gates | 10000 | 10,000 |
| Logic Array Blocks (LABs) | 16 | 16 |
| Maximum Operating Frequency | 80 MHz | 87 MHz |
| Pin-to-Pin Delay (tPD) | 7.5 ns | — |
| Speed Grade | -19 | — |
| User I/O Pins | 208 | — |
| 封装 | 256-ball FineLine BGA (FC) | FBGA-256 (FineLine BGA) |
| Supply Voltage VCCINT | 3.3 V | — |
| I/O Supply Voltage VCCIO | 2.5 V or 3.3 V (5.0 V tolerant inputs) | — |
| Programming Interface | JTAG (IEEE 1149.1) / ISP (IEEE 1532) | JTAG / IEEE Std. 1532 ISP |
| Process Technology | 0.30 µm CMOS EEPROM | — |
| 工作温度 | -40C to +85C (industrial) | -40C to +85C (industrial) |
| Non-volatile Configuration | Yes (EEPROM-based) | — |
| 安装类型 | Surface Mount | Surface Mount (BGA) |
| RoHS 状态 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| Device Family | — | MAX 3000A |
| Logic Elements / Macrocells | — | 512 macrocells |
| Supply Voltage - Core (VCCINT) | — | 3.3 V |
| I/O Supply Voltage (VCCIO) | — | 2.5 V / 3.3 V / 5.0 V (multi-volt I/O) |
| Programmable Pins (max) | — | [DATA_NEEDED: maximum user I/O pin count] |
| 存储器类型 | — | Non-volatile EPROM/EEPROM cell array |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |