EPM3512AFC256-2 vs EPM3512AFC256-10N 对比
详细并排对比 EPM3512AFC256-2 出自 Altera 和 EPM3512AFC256-10N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM3512AFC256-2 | EPM3512AFC256-10N |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $14.85 | $43.22 |
| Family | MAX 3000A | MAX 3000A |
| Macrocells | 512 | 512 |
| Logic Array Blocks (LABs) | 16 | [DATA_NEEDED: number of LABs] |
| Maximum User I/O Pins | 212 | — |
| Propagation Delay (tPD, -2 grade) | [DATA_NEEDED: tPD ns] | — |
| Maximum Operating Frequency | [DATA_NEEDED: fMAX MHz] | — |
| Core Supply Voltage | 3.3 V | — |
| I/O Output Drive Voltage | 2.5 V or 3.3 V (MultiVolt) | — |
| Input Tolerance | 2.5 V, 3.3 V, 5.0 V tolerant | — |
| 封装 | BGA-256 (FineLine BGA) | 256-ball FBGA (17 mm x 17 mm) |
| Ball Pitch | 1.0 mm | — |
| Programming Interface | JTAG (IEEE Std 1149.1) / ByteBlaster | — |
| Process Technology | 0.30 um CMOS EEPROM | — |
| 工作温度 | 0C to +70C (commercial) | — |
| RoHS 状态 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Speed Grade | -2 | — |
| Usable Gates | — | 10000 |
| User I/O Pins | — | 208 |
| Operating Frequency (fMAX) | — | [DATA_NEEDED: fMAX MHz] |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Setup Time (tSU) | — | 4.5 ns |
| VCCINT (Core Supply) | — | 3.3 V |
| VCCIO (I/O Supply) | — | 3.3 V or 2.5 V |
| Technology | — | CMOS EEPROM-based, non-volatile |
| Operating Temperature (Commercial) | — | 0 C to +70 C |
| ISP Interface | — | IEEE Std. 1149.1 JTAG, IEEE Std. 1532 |
| 安装类型 | — | Surface Mount (BGA) |
| MSL 等级 | — | [DATA_NEEDED: MSL rating] |