EPM3512AFI256-7N vs EPM3512ATC256-10N 对比
详细并排对比 EPM3512AFI256-7N 出自 Altera 和 EPM3512ATC256-10N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM3512AFI256-7N | EPM3512ATC256-10N |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 最后采购期 | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $27.95 | $20.10 |
| Family | MAX 3000A | MAX 3000A |
| Device Logic Elements / Macrocells | 512 macrocells | — |
| Typical Usable Gates | 10,000 gates | — |
| Logic Array Blocks (LABs) | 16 | 16 |
| Maximum User I/O Pins | [DATA_NEEDED: user I/O count] | 208 |
| Maximum Operating Frequency (fMAX) | 116.3 MHz | — |
| Pin-to-Pin Delay (tPD, speed grade -7) | approximately 7.5 ns | — |
| Supply Voltage (VCCINT) | 3.3 V | — |
| MultiVolt I/O Levels | 2.5 V / 3.3 V / 5 V mixed | — |
| Configuration Memory | Non-volatile EEPROM | — |
| Programming Interface | IEEE 1149.1 JTAG (in-system programmable) | JTAG (IEEE Std. 1149.1) - in-system programmable |
| 封装 | 256-ball FBGA | FBGA-256 (FineLine BGA, 17x17 mm, 1.0 mm pitch) |
| 工作温度范围 | -40C to +85C (industrial) | — |
| Lead-Free / RoHS | Yes ('N' suffix, lead-free) | — |
| Design Software | Quartus II (legacy MAX 3000A support) | — |
| Speed Grade | -7 | — |
| 安装类型 | Surface Mount (BGA) | Surface Mount |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Macrocells | — | 512 |
| Propagation Delay (tPD1) | — | 10 ns |
| Core Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Supply Voltage (VCCIO) | — | 1.8 V / 2.5 V / 3.3 V / 5.0 V (MultiVolt) |
| 工作温度 | — | 0 C to +70 C (commercial, "C" suffix) |
| Process Technology | — | 0.30 um CMOS EEPROM |
| RoHS 状态 | — | unknown |
| Lead-Free | — | unknown |