EPM3512AQI208-7 vs EPM3512AQI208-10 对比

详细并排对比 EPM3512AQI208-7 出自 Altera 和 EPM3512AQI208-10 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM3512AQI208-7 EPM3512AQI208-10
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $9.85 $15.20
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) —
Usable Gates 10,000 —
Macro Cells 512 —
Logic Array Blocks (LABs) 16 16
Maximum Operating Frequency 116.3 MHz —
Speed Grade -7 —
Pin-to-Pin Delay (tPD) [DATA_NEEDED: tPD in ns] —
Core Supply Voltage (VCCINT) 3.3 V —
I/O Supply Voltage (VCCIO) 2.5 V / 3.3 V / 5.0 V —
Programmability Non-volatile, in-system programmable (IEEE Std. 1532) —
JTAG Support Yes (IEEE 1149.1 boundary scan + ISP) —
User I/O Pins [DATA_NEEDED: user I/O count for PQFP-208] —
封装 208-pin PQFP —
安装类型 Surface Mount —
工作温度 -40C to +85C (industrial) -40C to +85C (Industrial, I suffix)
Lead-Free / RoHS Compliant per Altera product page —
Macrocells — 512
Maximum User I/Os — 172
引脚数量 — 208
Package Type — PQFP-208 (FINE LINE BGA-256, FQFP, Gull Wing)
Propagation Delay (tPD) — 10 ns
Counter Frequency — 116 MHz
Logic Family — CMOS, EEPROM-based
Core Supply Voltage — 3.3 V
I/O Interface Voltages — 5.0 V / 3.3 V / 2.5 V (MultiVolt)
In-System Programmability — Yes (IEEE 1149.1 JTAG)
PCI Compliance — PCI Local Bus Specification Revision 2.2
RoHS 状态 — [DATA_NEEDED: RoHS compliance status]

数据手册与资源

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