EPM5032DC-15 vs EPM5032DC20 对比
详细并排对比 EPM5032DC-15 出自 Altera 和 EPM5032DC20 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Altera
EPM5032DC-15 - 600-Gate, 32-Macrocell UV PLD | Altera MAX 5000 | DIP-28
EPM5032DC-15 Obsolete
规格对比
| 参数 | EPM5032DC-15 | EPM5032DC20 |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $9.95 | $8.20 |
| Family | MAX 5000 | — |
| Device Type | UV-erasable EPLD (PAL-type CMOS) | — |
| Usable Gates | 600 | 600 |
| Macrocells | 32 | 32 |
| Propagation Delay (tPD) | 15 ns | 20 ns |
| Maximum Toggle Frequency (fMAX) | 83.3 MHz | — |
| Supply Voltage (VCC) | 5 V (nominal) | 5 V (4.75 V to 5.25 V) |
| Logic Family | CMOS, TTL-compatible I/O | — |
| Programmable Pins | 16 bidirectional I/O + 4 dedicated input = 20 | — |
| Total Package Pins | 28 | — |
| 封装 | CERDIP-28 (windowed, through-hole) | 20-pin Ceramic DIP (DC) with UV window |
| 安装类型 | Through-Hole (DIP) | Through-Hole (DIP) |
| 工作温度 | 0C to +70C (commercial) | [DATA_NEEDED: operating temperature range] |
| Erasure Method | UV light through ceramic quartz window | — |
| Process Technology | CMOS | CMOS |
| RoHS 状态 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance] |
| Lead-Free | unknown | — |
| Device Family | — | MAX 5000 |
| Product Type | — | UV-erasable PLD (CPLD class) |
| Maximum Frequency (Fmax) | — | 71.4 MHz |
| Dedicated Inputs | — | 7 |
| I/O Pins | — | 16 (bidirectional) |
| Total Inputs (max) | — | 24 |
| Output Macrocells | — | 16 |
| Clock Inputs | — | 1 (global) |
| Architecture | — | PAL-type with Programmable Interconnect Array (PIA) |