EPM5032DC-15 vs EPM5032PC-15 对比
详细并排对比 EPM5032DC-15 出自 Altera 和 EPM5032PC-15 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Altera
EPM5032DC-15 - 600-Gate, 32-Macrocell UV PLD | Altera MAX 5000 | DIP-28
EPM5032DC-15 Obsolete规格对比
| 参数 | EPM5032DC-15 | EPM5032PC-15 |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $9.95 | $8.10 |
| Family | MAX 5000 | — |
| Device Type | UV-erasable EPLD (PAL-type CMOS) | EPLD (Erasable PLD) |
| Usable Gates | 600 | 600 |
| Macrocells | 32 | — |
| Propagation Delay (tPD) | 15 ns | 15 ns |
| Maximum Toggle Frequency (fMAX) | 83.3 MHz | — |
| Supply Voltage (VCC) | 5 V (nominal) | — |
| Logic Family | CMOS, TTL-compatible I/O | — |
| Programmable Pins | 16 bidirectional I/O + 4 dedicated input = 20 | — |
| Total Package Pins | 28 | — |
| 封装 | CERDIP-28 (windowed, through-hole) | 28-pin PDIP (PC suffix = windowed CerDIP) |
| 安装类型 | Through-Hole (DIP) | Through-Hole (DIP) |
| 工作温度 | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Erasure Method | UV light through ceramic quartz window | — |
| Process Technology | CMOS | — |
| RoHS 状态 | [DATA_NEEDED: RoHS status] | Non-compliant (CerDIP window, contains Be) |
| Lead-Free | unknown | No |
| Device Family | — | MAX 5000 |
| Macro Cells | — | 32 |
| Logic Elements / LABs | — | 1 LAB (4 macrocells per group) |
| Maximum Internal Frequency | — | 76.9 MHz (some sources list 83.3 MHz) |
| Operating Voltage (VCC) | — | 5 V (typ.) |
| Technology Node | — | 0.8 micron CMOS |
| Configuration Memory | — | UV-Erasable EPROM |
| Dedicated Inputs | — | 7 |
| Bidirectional I/O Pins | — | 16 |
| Total Array Inputs | — | 24 |
| Pin/Package Suffix | — | PC = Windowed Ceramic DIP |
| Speed Grade | — | 15 (15 ns tPD) |
| Programming Tool | — | Altera Logic Programmer + MAX+plus II |