EPM5032DM vs EPM5032DC-25 对比

详细并排对比 EPM5032DM 出自 Intel 和 EPM5032DC-25 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM5032DM EPM5032DC-25
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 不推荐新设计
库存状态 有库存 有库存
单价(USD) $15.90 $3.55
Device Family MAX 5000 —
Macrocells 32 32
Propagation Delay (tPD) 25 ns —
Usable Gates 600 to 1000 (typical) —
Logic Inputs 32 —
Process Technology CMOS EEPROM CMOS, EPROM (UV-Erasable)
封装 CDIP-28 (ceramic windowed DIP, 28-pin) CDIP-28 (Windowed Ceramic DIP-28)
Supply Voltage (VCC) 5 V (typical) —
Standby Current [DATA_NEEDED: ICC standby current] —
工作温度 -55C to +125C (military/extended, ceramic package) [DATA_NEEDED: operating temperature range]
Programming Technology UV-erasable (windowed) EEPROM —
Logic Function Combinational and registered (synchronous) —
Output Polarity Programmable —
Program Retention Non-volatile (EEPROM) —
安装类型 Through-hole (DIP) —
RoHS 状态 Non-compliant (ceramic DIP with UV window) Lead Free / RoHS Compliant (per distributor listings)
Lead-Free No (ceramic DIP contains lead) —
Manufacturer — Altera (Intel Programmable Solutions Group)
Product Family — MAX 5000
Device Type — UV Erasable Programmable Logic Device (EPLD)
Pin-to-Pin Propagation Delay (tPD) — 25 ns
Maximum Counter Frequency (fCNT) — [DATA_NEEDED: maximum counter frequency]
Setup Time (tSU) — [DATA_NEEDED: setup time]
Number of Dedicated Inputs — 32 (in DIP-28 pinout)
Number of I/O Pins — 22 (in DIP-28 pinout, 4 used as dedicated inputs)
Architecture — PAL-Type, Single-LAB, 32-Macrocell
Output Structure — Programmable I/O with output enable
Flip-Flop Configuration — D, T, JK, or SR (programmable)
Programming Method — UV erase + Altera/Intel MAX+PLUS II programmer
Erasure Method — UV light through ceramic window

数据手册与资源

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