EPM5032SC-20 vs EPM5032DC-25 对比

详细并排对比 EPM5032SC-20 出自 Altera 和 EPM5032DC-25 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM5032SC-20 EPM5032DC-25
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 不推荐新设计
库存状态 有库存 有库存
单价(USD) $8.75 $3.55
Device Type EPLD (Erasable Programmable Logic Device) UV Erasable Programmable Logic Device (EPLD)
Family MAX 5000 —
Macrocells 32 32
Dedicated Inputs 7 —
I/O Pins 16 —
Outputs 16 —
Propagation Delay (tPD) 20 ns —
Speed Grade -20 (20 ns) —
Architecture PAL-type, CMOS, UV-erasable PAL-Type, Single-LAB, 32-Macrocell
Interconnect Programmable Interconnect Array (PIA) —
封装 20-pin SOIC (Small Outline) CDIP-28 (Windowed Ceramic DIP-28)
工作温度 0 °C to +70 °C (commercial grade) [DATA_NEEDED: operating temperature range]
安装类型 Surface Mount —
电源电压 [DATA_NEEDED: VCC typical range] —
Technology CMOS EPROM cell —
Programmability One-time programmable (windowless SOIC) —
RoHS 状态 [DATA_NEEDED: RoHS status not confirmed in verified data] Lead Free / RoHS Compliant (per distributor listings)
Manufacturer — Altera (Intel Programmable Solutions Group)
Product Family — MAX 5000
Pin-to-Pin Propagation Delay (tPD) — 25 ns
Maximum Counter Frequency (fCNT) — [DATA_NEEDED: maximum counter frequency]
Setup Time (tSU) — [DATA_NEEDED: setup time]
Number of Dedicated Inputs — 32 (in DIP-28 pinout)
Number of I/O Pins — 22 (in DIP-28 pinout, 4 used as dedicated inputs)
Process Technology — CMOS, EPROM (UV-Erasable)
Output Structure — Programmable I/O with output enable
Flip-Flop Configuration — D, T, JK, or SR (programmable)
Programming Method — UV erase + Altera/Intel MAX+PLUS II programmer
Erasure Method — UV light through ceramic window

数据手册与资源

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