EPM5192AJC84-20 vs EPM5192AJC-15 对比

详细并排对比 EPM5192AJC84-20 出自 Altera 和 EPM5192AJC-15 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM5192AJC84-20 EPM5192AJC-15
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 不推荐新设计
库存状态 有库存 有库存
单价(USD) $19.20 $9.85
Family MAX 5000 MAX 5000
Device Type UV-erasable/OTP Complex PLD (CPLD) EPLD (Erasable Programmable Logic Device)
Macrocells 192 192
Propagation Delay (tpd) 33 ns (speed grade -20) —
最大时钟频率 66.7 MHz —
Supply Voltage (Vcc) 4.75 V to 5.25 V —
Dedicated Inputs 7 —
User I/O Lines 64 —
Process Technology CMOS, UV-erasable EEPROM —
封装 84-pin PLCC J-Lead (WQCCJ, J84) 84-pin PLCC (J-lead, ceramic, non-windowed)
Operating Temperature Grade Commercial —
安装类型 Surface Mount (J-Lead) Surface Mount
MSL 等级 [DATA_NEEDED: MSL level] —
RoHS 状态 [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS compliance]
Programming Tool Altera MAX+PLUS II / Quartus (legacy) —
Lead-Free / Halogen-Free [DATA_NEEDED: lead-free status] —
Logic Capacity — 100% connectivity, sum-of-products PLA architecture
Pin-to-Pin Delay (tPD) — 15 ns
Supply Voltage (VCC) — 5 V (4.75 V to 5.25 V)
工作温度 — 0C to +70C (commercial)
Programmability — UV-erasable (windowed variant) / One-Time-Programmable
Toolchain — MAX+PLUS II
引脚数量 — 84
User I/O Pins — [DATA_NEEDED: user I/O count]
Speed Grades Available — -15, -20, -25 (this part: -15)
Configuration Memory — EPROM (UV-erasable)

数据手册与资源

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