EPM5192AQC100-15 vs EPM5192AQM100-20 对比

详细并排对比 EPM5192AQC100-15 出自 Altera 和 EPM5192AQM100-20 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM5192AQC100-15 EPM5192AQM100-20
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $9.95 $8.20
Manufacturer Altera (now Intel) —
Family MAX 5000 —
Device Type UV-Erasable / OTP Complex PLD (CPLD) —
Technology CMOS —
Macrocells 192 —
Logic Array Blocks (LABs) 12 —
Propagation Delay (tPD) 25 ns (-15 speed grade) —
Total Inputs 72 —
Dedicated Inputs 7 7
User I/O Pins 64 —
External Clock Inputs 1 —
Interconnect Programmable Interconnect Array (PIA) —
封装 100-pin PQFP (R-PQFP-G100) 100-pin PQFP (JESD-30 code R-PQFP-G100)
安装类型 Surface Mount Surface Mount
Configuration Memory EPROM (UV-erasable, OTP) On-chip EPROM (non-volatile, one-time programmable in this package)
RoHS 状态 [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: verified from manufacturer product page]
工作温度 [DATA_NEEDED: operating temperature range] —
Device Family — MAX 5000 (EPLD / classic CPLD)
Logic Elements — 192 macrocells across 12 Logic Array Blocks (LABs)
Number of LABs — 12
User I/O Lines — 64
Pin-to-Pin Propagation Delay (tPD) — 33 ns
Maximum Clock Frequency (fMAX) — 66.7 MHz
Process Technology — CMOS EPROM-based
Boundary-Scan Test — JTAG / IEEE 1149.1 compatible
External Clock Input — Yes (global clock pin)
Operating Temperature Grade — [DATA_NEEDED: explicit temperature grade from datasheet]
电源电压 — [DATA_NEEDED: VCC range from datasheet]

数据手册与资源

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