EPM5192GI84 vs EPM5192GI 对比

详细并排对比 EPM5192GI84 出自 Altera 和 EPM5192GI 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM5192GI84 EPM5192GI
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $19.80 $18.95
Family MAX 5000 MAX 5000
Device Type UV-Erasable / OTP Complex PLD (CPLD) CPLD (Complex Programmable Logic Device)
Macrocells 192 192
Logic Array Blocks [DATA_NEEDED: number of LABs] —
封装 84-pin PGA (WPGA, square, through-hole, pin/peg terminals) —
Package Code WPGA —
Operating Voltage (VCC) 5 V (typical) —
I/O Logic Compatibility TTL —
Temperature Grade Industrial —
Programmable Flip-Flop Modes D, T, JK, SR —
Programmability UV-erasable (windowed) / OTP —
Programming File Format JEDEC map via MAX+PLUS II / A+PLUS —
Propagation Delay [DATA_NEEDED: tPD in ns] —
Max User I/O Pins [DATA_NEEDED: usable I/O count for this package] —
工作温度范围 -40 C to +85 C (industrial) —
安装类型 Through-Hole (PGA socket or PCB pin/peg) Through-hole (PGA)
RoHS 状态 [DATA_NEEDED: most legacy PGA parts are non-RoHS] [DATA_NEEDED: not confirmed in verified web data]
Lead-Free [DATA_NEEDED: legacy part, likely contains lead] —
Number of Terminals 84 —
Terminal Form PIN/PEG —
Package Shape SQUARE —
Technology — CMOS EPROM (UV-erasable / OTP)
Logic Array Blocks (LABs) — 16 (12 macrocells per LAB)
User I/O Pins — 64
Dedicated Inputs — 7
Total Inputs — 72
Propagation Delay (tPD) — 55 ns
Maximum Internal Frequency (fCNT) — 33.3 MHz
Supply Voltage (VCC) — 4.5 V to 5.5 V (nominal 5 V)
工作温度 — -40 C to +85 C (Industrial)
Package Type — 84-pin PGA (Pin Grid Array), ceramic with quartz window
Programmable — UV-erasable (windowed) and OTP variants

数据手册与资源

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