EPM5192GM883B-2 vs EPM5192JM 对比
详细并排对比 EPM5192GM883B-2 出自 Altera 和 EPM5192JM 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM5192GM883B-2 | EPM5192JM |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $142.00 | $171.00 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | CPLD (Complex Programmable Logic Device), UV-erasable | UV-Erasable Programmable Logic Device (EPLD) |
| Macrocells | 192 | 192 |
| Propagation Delay (tPD) | 45 ns (-2 speed grade) | 55 ns |
| Maximum Internal Clock Frequency | 33.3 MHz | — |
| Supply Voltage (VCC, nominal) | 5 V | — |
| Technology | 5 V CMOS | CMOS, UV-erasable |
| Dedicated Inputs | 7 | 7 |
| User I/O Pins | 64 | — |
| 封装 | 84-pin Ceramic Pin Grid Array (CPGA), code S-CPGA-P84 | 84-pin Ceramic JLCC with quartz window (J84) |
| Package Outline | 28.45 mm square (approx.) | — |
| Military Screening | MIL-STD-883 (per '883' suffix) | — |
| 安装类型 | Through-hole PGA socket | — |
| 工作温度 | [DATA_NEEDED: operating temperature range] | — |
| RoHS 状态 | non_compliant (ceramic CPGA with MIL-STD-883 screening) | — |
| JEDEC Package Code | S-CPGA-P84 | — |
| Maximum User I/O | — | 64 |
| Total Input Channels | — | 72 |
| Supply Voltage (VCC) | — | 4.5 V to 5.5 V (nominal 5 V) |
| 工作温度范围 | — | -55 C to +125 C (military grade, 'M' suffix) |
| Logic Architecture | — | Shared product-term AND/OR, programmable polarity |
| Programming Method | — | UV erase + EPROM programmer, JEDEC map |
| Development Tool | — | MAX+PLUS II (legacy Altera toolchain) |
| Compliance | — | MIL-STD-883 processing available on /883B suffix variants |