EPM5192JC84-1 vs EPM5192GC84-1 对比

详细并排对比 EPM5192JC84-1 出自 Altera 和 EPM5192GC84-1 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM5192JC84-1 EPM5192GC84-1
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $15.20 $14.20
Device Type UV-Erasable/OTP Complex Programmable Logic Device (CPLD) —
Family MAX 5000 MAX 5000
Macrocells 192 192
Propagation Delay (tpd) 40 ns (worst case) —
Supply Voltage (Vcc) 4.75 V to 5.25 V (5 V ±5 %) —
Process Technology CMOS EPROM —
Operating Temperature Grade Commercial —
封装 84-terminal Ceramic Chip Carrier (CQCC84 / J-lead) 84-pin PGA (Pin Grid Array), WPGA code
JESD-30 Package Code S-CQCC-J84 —
Terminal Form J-BEND —
Package Shape SQUARE —
安装类型 Surface Mount Through-hole (PGA socket)
Programmability UV-erasable (window) / OTP in production —
Configuration Memory EPROM (non-volatile, instant-on) —
RoHS 状态 [DATA_NEEDED: RoHS status] Compliant (per third-party distributor listing)
Product Type — UV-Erasable/OTP Complex PLD (CPLD)
Technology — CMOS (EPROM-cell based)
Propagation Delay (tPD) — 40 ns (speed grade -1)
最大时钟频率 — 50 MHz
Supply Voltage (VCC) — 4.75 V to 5.25 V
Dedicated Inputs — 7
User I/O Pins — 64
Total Inputs / Outputs — 72 inputs / 64 outputs
Architecture — Shared input/clock and shared product terms
Temperature Grade — Commercial
Programming Method — UV erasure (quartz window) + EPROM programmer
Logic Element Type — Macrocells with AND/OR array

数据手册与资源

浏览全部产品 创建 BOM 获取报价