EPM5192LC-2 vs EPM5192LC-45 对比

详细并排对比 EPM5192LC-2 出自 Altera 和 EPM5192LC-45 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM5192LC-2 EPM5192LC-45
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $7.95 $24.00
Family MAX 5000 MAX 5000
Device Type CPLD (Complex Programmable Logic Device) —
Macrocells 192 192
Logic Array Blocks (LABs) 12 —
User I/O Pins 64 —
Dedicated Input Pins 7 —
External Clock Inputs 1 —
Propagation Delay (tPD) 45 ns (typical, -2 speed grade) —
Maximum Internal Frequency 50 MHz —
Interconnect Programmable Interconnect Array (PIA) —
Process Technology CMOS —
封装 PQCC-84 (PLCC-84, J-lead, surface mount) —
Programming Non-volatile (EPROM/EEPROM-based, in-system programmable via JTAG) —
工作温度 [DATA_NEEDED: commercial/industrial/military grade] 0C to +70C (commercial)
电源电压 5 V (typical MAX 5000 family) 5 V
RoHS 状态 [DATA_NEEDED: pre-RoHS legacy part — likely non-RoHS] [DATA_NEEDED: RoHS status]
Series — EPM5192
Logic Elements — 192 macrocells
Maximum Operating Frequency — 100 MHz
Pin-to-Pin Delay (tPD) — 45 ns
Dedicated Inputs — [DATA_NEEDED: dedicated input count]
Programmable I/O Pins — [DATA_NEEDED: I/O pin count]
Configuration Memory — UV-erasable EPROM / OTP
Technology — EPROM-based CMOS
Package Type — LCC (Leaded Ceramic Chip Carrier) with UV window
Package Code — LC
Speed Grade — -45 (45 ns tPD)
安装类型 — Surface Mount (LCC)
Datasheet Page Count — 52 pages

数据手册与资源

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