EPM5192LC-M205A vs EPM5192LC-2 对比
详细并排对比 EPM5192LC-M205A 出自 Altera 和 EPM5192LC-2 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM5192LC-M205A | EPM5192LC-2 |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $23.75 | $7.95 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 192 | 192 |
| Logic Array Blocks (LABs) | 12 | 12 |
| Dedicated Inputs | 7 | — |
| I/O Pins | 64 | — |
| Propagation Delay (tPD) | 55 ns | 45 ns (typical, -2 speed grade) |
| Supply Voltage (VCC) | 5 V | — |
| Technology | CMOS EPROM (UV-erasable / OTP) | — |
| Programmable Interconnect | Programmable Interconnect Array (PIA) | — |
| Global Clock Inputs | 1 | — |
| 工作温度 | [DATA_NEEDED: operating temperature grade] | [DATA_NEEDED: commercial/industrial/military grade] |
| Package Type | 205-pin (M205A) | — |
| 安装类型 | Surface Mount | — |
| RoHS 状态 | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: pre-RoHS legacy part — likely non-RoHS] |
| Configuration Memory | UV-erasable / OTP EPROM | — |
| User I/O Pins | — | 64 |
| Dedicated Input Pins | — | 7 |
| External Clock Inputs | — | 1 |
| Maximum Internal Frequency | — | 50 MHz |
| Interconnect | — | Programmable Interconnect Array (PIA) |
| Process Technology | — | CMOS |
| 封装 | — | PQCC-84 (PLCC-84, J-lead, surface mount) |
| Programming | — | Non-volatile (EPROM/EEPROM-based, in-system programmable via JTAG) |
| 电源电压 | — | 5 V (typical MAX 5000 family) |