EPM5192LI-1 vs EPM5192JI-2 对比

详细并排对比 EPM5192LI-1 出自 Altera 和 EPM5192JI-2 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM5192LI-1 EPM5192JI-2
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $16.40 $9.95
Family MAX 5000 MAX 5000
Device Type EPLD (UV-Erasable/OTP Complex PLD) EPLD (Erasable Programmable Logic Device)
Usable Gates 3,750 5000
Macrocells 192 192
Maximum Toggle Frequency 40 MHz —
电源电压 5 V 5 V (typical)
Propagation Delay (tPD) [DATA_NEEDED: tPD in ns at -1 grade] —
User I/O Pins [DATA_NEEDED: user I/O count for JLCC variant] —
Package Type JLCC (windowed, ceramic, UV-erasable) —
Process Technology CMOS EPROM, UV-erasable CMOS EPROM
Speed Grade -1 -2
工作温度 [DATA_NEEDED: industrial vs military range] 0C to +70C (commercial)
引脚数量 [DATA_NEEDED: pin count of LI package] —
安装类型 Surface Mount (JLCC with J-leads) Surface Mount
MSL 等级 [DATA_NEEDED: MSL level] —
RoHS 状态 [DATA_NEEDED: RoHS status of ceramic LI variant] Non-compliant (ceramic JLCC, contains lead)
Lead Free [DATA_NEEDED: lead-free] —
Programmable Interconnect Programmable Interconnect Array (PIA) —
Architecture EEPROM/EPROM-based, non-volatile, instant-on Sum-of-products with Programmable Interconnect Array (PIA)
Dedicated Inputs — 12
Flip-Flops — 192
封装 — JLCC-68 (J-Lead Ceramic)
Programming Technology — UV-Erasable EPROM
生命周期状态 — Obsolete (legacy Altera MAX 5000 family)

数据手册与资源

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