EPM5192QC-1 vs EPM5192AQC100-20 对比

详细并排对比 EPM5192QC-1 出自 Altera 和 EPM5192AQC100-20 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM5192QC-1 EPM5192AQC100-20
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $9.95 $11.85
Family MAX 5000 —
Device Type OTP PLD (One-Time-Programmable) —
Macrocells 192 192
Logic Array Blocks (LABs) 12 —
User I/O Pins 64 —
Dedicated Inputs 7 —
Propagation Delay (tPD) 40 ns —
Maximum Clock Frequency (fMAX) 50 MHz —
Supply Voltage (VCC) 4.75 V to 5.25 V —
Process Technology CMOS CMOS
封装 PQFP-100 (R-PQFP-G100) 100-lead PQFP (R-PQFP-G100)
Lead Pitch 0.650 mm —
Terminal Form Gull-wing —
安装类型 Surface Mount Surface Mount (PQFP)
Interconnect Programmable Interconnect Array (PIA) —
External Clock Pins 1 (shared clock) —
Configuration Memory EPROM (OTP, windowless) —
RoHS 状态 [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: RoHS status]
Device Family — MAX 5000
Product Type — Complex Programmable Logic Device (CPLD)
Maximum Operating Frequency — 66.7 MHz
Propagation Delay (tpd) — 33 ns
Terminal Pitch — 0.65 mm
Programming Technology — UV-Erasable / One-Time-Programmable (OTP)
电源电压 — 5 V (typical, MAX 5000 family)
工作温度范围 — [DATA_NEEDED: operating temperature range]
I/O Count — [DATA_NEEDED: usable I/O count]
Logic Array Blocks — Multiple LABs (per MAX 5000 architecture)
Lead-Free — [DATA_NEEDED: lead-free status]
MSL 等级 — [DATA_NEEDED: MSL rating]

数据手册与资源

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