EPM570GF100I5N vs EPM570GT100I5 对比

详细并排对比 EPM570GF100I5N 出自 Intel 和 EPM570GT100I5 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM570GF100I5N EPM570GT100I5
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 有效 有效
库存状态 有库存 有库存
单价(USD) $10.35 $4.95
Series MAX II MAX II
Family Complex Programmable Logic Device (CPLD) —
Logic Elements (LEs) 570 —
Macrocells 440 440
User I/Os 76 —
User Flash Memory (UFM) 8192 bits —
Propagation Delay (tPD) 5.4 ns 5.4 ns (typ)
Maximum Internal Frequency 201.1 MHz —
Supply Voltage VCCINT 1.71 V to 1.89 V (typ 1.8 V) —
I/O Bank Voltage VCCIO 1.5 V / 1.8 V / 2.5 V / 3.3 V compatible —
Process Technology 0.18 µm CMOS Flash —
封装 FBGA-100 (11 x 11 mm, 1.0 mm pitch) 100-pin TQFP (14x14 mm, 0.5 mm pitch)
安装类型 Surface Mount Surface Mount (Gull-wing leads)
工作温度 -40 °C to +100 °C (Industrial) -40 C to +100 C (Industrial, "I5")
Programming Interface JTAG (IEEE 1149.1) / ByteBlaster —
RoHS 状态 Compliant Compliant
Logic Elements (LE) — 570
Maximum User I/O Pins — 76
Internal Supply Voltage (VCCINT) — 1.71 V to 1.89 V
User I/O Voltage (VCCIO) — 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt)
User Flash Memory — 8 Kbits
Programmability — In-System Programmable (ISP) via JTAG, non-volatile flash
Configuration Time — Instant-On (< 1 ms, no external PROM required)
Typical Active Current — [DATA_NEEDED: typical active ICC]
Speed Grade — GT (fast)
JTAG Support — IEEE 1149.1 boundary scan
Global Clock Networks — 4

数据手册与资源

浏览全部产品 创建 BOM 获取报价