EPM570GT100C5 vs EPM570GT100I5 对比

详细并排对比 EPM570GT100C5 出自 Intel 和 EPM570GT100I5 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM570GT100C5 EPM570GT100I5
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 有效 有效
库存状态 有库存 有库存
单价(USD) $10.95 $4.95
Family MAX II —
Device Type CPLD (Complex Programmable Logic Device) —
Logic Elements (LE) 570 570
Equivalent Macrocells 440 —
User Flash Memory (UFM) 8 Kbits —
Maximum User I/O 76 —
Propagation Delay (tPD) 5.4 ns 5.4 ns (typ)
Core Supply Voltage 1.8 V —
I/O Supply Voltages (MultiVolt) 1.5 V / 1.8 V / 2.5 V / 3.3 V / 5 V —
封装 TQFP-100 (100-pin TQFP, 14x14 mm) 100-pin TQFP (14x14 mm, 0.5 mm pitch)
工作温度 0 °C to +85 °C (Commercial) -40 C to +100 C (Industrial, "I5")
Process Technology 0.30 µm 6-layer-metal flash —
Programming Interface JTAG IEEE 1149.1, ISP —
Configuration Method Non-volatile flash (instant-on) —
安装类型 Surface Mount Surface Mount (Gull-wing leads)
RoHS 状态 Compliant Compliant
Series — MAX II
Macrocells — 440
Maximum User I/O Pins — 76
Internal Supply Voltage (VCCINT) — 1.71 V to 1.89 V
User I/O Voltage (VCCIO) — 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt)
User Flash Memory — 8 Kbits
Programmability — In-System Programmable (ISP) via JTAG, non-volatile flash
Configuration Time — Instant-On (< 1 ms, no external PROM required)
Typical Active Current — [DATA_NEEDED: typical active ICC]
Speed Grade — GT (fast)
JTAG Support — IEEE 1149.1 boundary scan
Global Clock Networks — 4

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