EPM570GT100I5N vs EPM570GT100I5 对比

详细并排对比 EPM570GT100I5N 出自 Altera 和 EPM570GT100I5 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM570GT100I5N EPM570GT100I5
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 有效 有效
库存状态 有库存 有库存
单价(USD) $16.50 $4.95
Family MAX II —
Logic Elements 570 LE —
Equivalent Macrocells 440 macrocells —
Number of LABs 57 —
User I/Os 76 —
Maximum Operating Frequency 304 MHz —
Propagation Delay (tPD1) 5.4 ns —
Operating Supply Voltage (Core) 1.8 V —
User Flash Memory 8 Kbit 8 Kbits
封装 100-pin TQFP (GT100) 100-pin TQFP (14x14 mm, 0.5 mm pitch)
安装类型 Surface Mount (SMD/SMT) Surface Mount (Gull-wing leads)
工作温度 -40 °C to +100 °C (Industrial) -40 C to +100 C (Industrial, "I5")
Process 0.18 µm, 6-layer-metal flash —
JTAG Support Yes (IEEE 1149.1 boundary-scan) IEEE 1149.1 boundary scan
MultiVolt I/O Support 1.8 V / 2.5 V / 3.3 V —
Internal Oscillator Yes —
Non-volatile Configuration Yes (instant-on, no external boot PROM) —
RoHS 状态 Compliant Compliant
Series — MAX II
Logic Elements (LE) — 570
Macrocells — 440
Maximum User I/O Pins — 76
Propagation Delay (tPD) — 5.4 ns (typ)
Internal Supply Voltage (VCCINT) — 1.71 V to 1.89 V
User I/O Voltage (VCCIO) — 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt)
Programmability — In-System Programmable (ISP) via JTAG, non-volatile flash
Configuration Time — Instant-On (< 1 ms, no external PROM required)
Typical Active Current — [DATA_NEEDED: typical active ICC]
Speed Grade — GT (fast)
Global Clock Networks — 4

数据手册与资源

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