EPM570GT144C5N vs EPM570T144C5N 对比
详细并排对比 EPM570GT144C5N 出自 Altera 和 EPM570T144C5N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM570GT144C5N | EPM570T144C5N |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 有效 | 有效 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $14.20 | $9.35 |
| Family | MAX II | MAX II |
| Logic Elements / Macrocells | 440 | — |
| Maximum User I/O Pins | 212 | 116 |
| Pin-to-Pin Propagation Delay (tPD) | 5.4 ns | — |
| Maximum Internal Frequency (fMAX) | 201.1 MHz | — |
| User Flash Memory | 8 Kbits | — |
| Process Technology | 0.18 µm | 0.18 µm 6-layer-metal flash |
| Core Supply Voltage (VCCINT) | 1.8 V | — |
| I/O Bank Supply Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| 工作温度范围 | 0 °C to +85 °C (Commercial) | — |
| 封装 | 144-pin TQFP (20 x 20 mm) | TQFP-144 (20 × 20 mm, 0.5 mm pitch) |
| 安装类型 | Surface Mount | Surface Mount |
| Programming Interface | JTAG (IEEE 1149.1) / IEEE 1532 ISP | IEEE 1149.1 JTAG (in-system programmable) |
| Configuration Time (Instant-On) | < 1 ms | — |
| RoHS 状态 | Compliant | Compliant |
| Supported I/O Standards | LVCMOS, LVTTL, PCI, SSTL-2, SSTL-3 | LVCMOS, LVTTL, PCI, LVDS, SSTL (per bank VCCIO) |
| Series | — | MAX II Device |
| Logic Elements (LEs) | — | 570 |
| Macrocells | — | 440 |
| User I/Os | — | 116 |
| Internal User Flash Memory | — | 8 Kbit |
| Global Clocks | — | 4 |
| Core Voltage (VCCINT) | — | 1.8 V (typical, internally regulated) |
| I/O Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V (multi-voltage, per bank) |
| Propagation Delay (tPD) | — | 5.5 ns (typical, [DATA_NEEDED: exact speed grade]) |
| Maximum Frequency (fMAX) | — | 201.1 MHz |
| 工作温度 | — | 0 °C to +85 °C (commercial, C5 grade) |
| Configuration Storage | — | On-chip non-volatile flash |
| Lead-Free | — | Yes |
| MSL 等级 | — | 3 (per JEDEC J-STD-020) |
| Design Software | — | Intel Quartus II (MAX II device support) |