EPM570T10015 vs EPM570GT100I5N 对比
详细并排对比 EPM570T10015 出自 Altera 和 EPM570GT100I5N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM570T10015 | EPM570GT100I5N |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 有效 | 有效 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $7.95 | $16.50 |
| Device Family | MAX II | — |
| Logic Elements | 570 | 570 LE |
| Macro Cells | 440 | — |
| User Flash Memory | 8 Kbits | 8 Kbit |
| Maximum User I/O Pins | 76 | — |
| 封装 | TQFP-100 (T100) 14 x 14 mm | 100-pin TQFP (GT100) |
| Pin-to-Pin Delay (tPD) | 15 ns (commercial/industrial speed grade) | — |
| Propagation Delay | [DATA_NEEDED: detailed tPD/tCO/tSU datasheet values] | — |
| Supply Voltage - Core (VCCINT) | 3.3 V (2.5 V variants exist in MAX II family) | — |
| Supply Voltage - I/O (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (multi-volt I/O) | — |
| 工作温度范围 | -40 °C to +85 °C (industrial) | — |
| Configuration Memory | On-chip flash (non-volatile, instant-on) | — |
| Programming Interface | JTAG (IEEE 1149.1 / IEEE Std 1532) | — |
| Supported I/O Standards | LVTTL, LVCMOS, PCI, SSTL (per pin) | — |
| Process Technology | 0.18 µm | — |
| RoHS 状态 | [DATA_NEEDED: RoHS compliance status] | Compliant |
| MSL 等级 | [DATA_NEEDED: moisture sensitivity level] | — |
| Family | — | MAX II |
| Equivalent Macrocells | — | 440 macrocells |
| Number of LABs | — | 57 |
| User I/Os | — | 76 |
| Maximum Operating Frequency | — | 304 MHz |
| Propagation Delay (tPD1) | — | 5.4 ns |
| Operating Supply Voltage (Core) | — | 1.8 V |
| 安装类型 | — | Surface Mount (SMD/SMT) |
| 工作温度 | — | -40 °C to +100 °C (Industrial) |
| Process | — | 0.18 µm, 6-layer-metal flash |
| JTAG Support | — | Yes (IEEE 1149.1 boundary-scan) |
| MultiVolt I/O Support | — | 1.8 V / 2.5 V / 3.3 V |
| Internal Oscillator | — | Yes |
| Non-volatile Configuration | — | Yes (instant-on, no external boot PROM) |