EPM570T100C4N vs EPM570T100C3N 对比

详细并排对比 EPM570T100C4N 出自 Intel 和 EPM570T100C3N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM570T100C4N EPM570T100C3N
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 有效 有效
库存状态 有库存 有库存
单价(USD) $9.05 $8.10
Family MAX II MAX II
Series MAX® II —
Logic Elements / Blocks 570 —
Macrocells 440 —
Number of User I/O 76 —
Propagation Delay (tpd) 5.4 ns (speed grade 4) —
Maximum Internal Frequency 247.5 MHz 304 MHz
Process Technology 0.18 µm 0.18 µm Flash
Supply Voltage - Internal 2.5 V / 3.3 V —
Programmable Type In-System Programmable (Flash, non-volatile) —
User Flash Memory 8 Kbits —
工作温度 0 °C to 85 °C (TJ, commercial) 0 °C to +85 °C (Commercial)
安装类型 Surface Mount Surface Mount
封装 / 外壳 100-TQFP (14 x 14 mm) —
Supplier Device Package 100-TQFP —
Configuration Memory Internal flash (no external PROM required) —
JTAG / ISP IEEE 1149.1 compliant —
I/O Bank Voltages 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) —
Product Status Active —
RoHS 状态 Compliant Compliant
Macro Cells — 440
Logic Elements (LEs) — 570
Maximum User I/Os — 76
Pin-to-Pin Delay (tPD1) — 5.4 ns
User Flash Memory (UFM) — 8 Kbits
Number of LABs — 57
Supply Voltage - Core — 2.5 V / 3.3 V
I/O Standards Supported — 1.5 V, 1.8 V, 2.5 V, 3.3 V (MultiVolt)
封装 — 100-TQFP (T100)
Programming Interface — JTAG / IEEE 1149.1 boundary-scan
In-System Programmable — Yes
Speed Grade — C3

数据手册与资源

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