EPM570T144I5N vs EPM570T144I5 对比
详细并排对比 EPM570T144I5N 出自 Intel 和 EPM570T144I5 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM570T144I5N | EPM570T144I5 |
|---|---|---|
| 品牌 | Intel | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 最后采购期 | 有效 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $10.50 | $22.97 |
| Family | MAX II | MAX II |
| Logic Elements | 570 LE | — |
| Macrocells | 440 | — |
| Maximum Pin-to-Pin Delay (tPD1) | 8.7 ns | — |
| Maximum Frequency (fCNT) | 304 MHz | — |
| User Flash Memory (UFM) | 8 Kbits | 8 Kbits |
| Supply Voltage - Core (VCCINT) | 3.0 V to 3.6 V (3.3 V typical) | — |
| I/O Bank Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| 工作温度 | -40C to +100C (industrial) | -40 °C to +100 °C (industrial) |
| Speed Grade | I5N | — |
| Process Technology | 0.18 um CMOS, 6-layer-metal flash | 0.18 µm flash |
| 封装 | TQFP-144 (22 mm x 22 mm, 0.5 mm pitch) | — |
| 安装类型 | Surface Mount | Surface Mount |
| Programming Interface | JTAG (IEEE 1149.1) / ISP | JTAG (IEEE 1149.1) |
| Boundary-Scan Test | IEEE 1149.1 compliant | — |
| RoHS 状态 | Compliant | [DATA_NEEDED: RoHS status] |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Macrocells (Logic Elements) | — | 440 |
| User I/O | — | 116 |
| Pin-to-Pin Delay (tPD1) | — | 5.4 ns |
| Maximum Frequency (fMAX) | — | 304 MHz |
| Supply Voltage - Core | — | 1.8 V |
| Supply Voltage - I/O Banks | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| 封装 / 外壳 | — | TQFP-144 (144-LQFP, 20 x 20 mm) |