EPM570ZM256C7N vs EPM570GM256C5N 对比
详细并排对比 EPM570ZM256C7N 出自 Altera 和 EPM570GM256C5N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM570ZM256C7N | EPM570GM256C5N |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 有效 | 有效 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $9.95 | $18.60 |
| Series | MAX II Z | MAX II |
| Family | MAX II | CPLD - Complex Programmable Logic Device |
| Logic Elements (LE) | 570 | — |
| Macro Cells | 440 | 440 |
| User I/Os | 76 | — |
| User Flash Memory | 8 Kbits | — |
| Maximum Operating Frequency | 123.5 MHz | 304 MHz |
| Pin-to-Pin Delay (tPD) | 5.0 ns | — |
| Core Supply Voltage | 1.71 V to 1.89 V (3.3 V with on-chip regulator) | — |
| I/O Supply Voltages | 1.5 V / 1.8 V / 2.5 V / 3.3 V / 5.0 V (MultiVolt) | — |
| Process Technology | 0.18 µm CMOS | 0.18 um flash-based CMOS |
| 工作温度 | 0 °C to +85 °C (commercial) | 0 °C to +85 °C (commercial) |
| 封装 | 256-ball MBGA (Micro FBGA), 0.5 mm pitch, 6 × 6 mm | — |
| Configuration Method | On-chip non-volatile (instant-on, ISP via JTAG) | — |
| JTAG Support | IEEE Std 1149.1 boundary-scan + ISP | Yes (IEEE 1149.1 / 1532) |
| Lead-Free / RoHS | Lead-free / RoHS compliant | — |
| Logic Family | CMOS | — |
| Logic Array Blocks (LABs) | — | 57 |
| Number of I/Os | — | 160 |
| Maximum Internal Frequency (datasheet fMAX) | — | 201.1 MHz |
| Pin-to-Pin Logic Delay (Speed Grade C5) | — | 5 ns |
| Operating Supply Voltage (Core VCCINT) | — | 1.71 V to 1.89 V (1.8 V nominal) |
| I/O Bank Supply Voltages | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V (multiVolt I/O) |
| Programmable Type | — | In System Programmable (ISP) via JTAG |
| 封装 / 外壳 | — | 256-ball Micro FineLine BGA, 11x11 mm, 0.8 mm pitch |
| 安装方式 | — | SMD/SMT |
| Packaging | — | Tray |
| Lead Free / RoHS Status | — | See manufacturer page; legacy part - verify per lot |
| Configuration Memory | — | Internal flash (non-volatile, instant-on) |
| Vertical Migration | — | Pin-compatible with EPM1270 and EPM2210 in the 256-MBGA package |