EPM7096LC84-15 vs EPM7128SLC84-10 对比

详细并排对比 EPM7096LC84-15 出自 Altera 和 EPM7128SLC84-10 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM7096LC84-15 EPM7128SLC84-10
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $9.85 $9.75
Family MAX 7000 MAX 7000S
Series MAX 7000 (second-generation MAX architecture) —
Macro Cells 96 —
Logic Array Blocks (LABs) 4 —
Usable Gates 1,800 —
Pin-to-Pin Propagation Delay (tPD) 15 ns —
Maximum Operating Frequency 76.9 MHz 125 MHz
User I/O Pins 68 (36 per LAB, [DATA_NEEDED: exact LAB-level split]) —
Supply Voltage (VCC) 4.75 V to 5.25 V —
Programmable Type EE PLD (in-system programmable via JTAG) —
Programming Interface IEEE Std. 1149.1 JTAG —
工作温度 0C to +70C (commercial) 0C to +70C (Commercial)
封装 / 外壳 84-PLCC (J-Lead) —
Supplier Device Package 84-PLCC (29.31 x 29.31 mm) —
安装类型 Surface Mount Surface Mount (J-bend)
Data Retention [DATA_NEEDED: data retention years] —
Erase/Program Endurance [DATA_NEEDED: erase/program cycle count] —
RoHS 状态 [DATA_NEEDED: RoHS compliance status] Non-compliant (contains lead in PLCC)
Device Type — CPLD (Complex Programmable Logic Device)
Macrocells — 128
Logic Gates — 2500
User I/Os — 68
Total Package Pins — 84
封装 — PLCC-84 (J-lead)
Propagation Delay (tpd) — 10 ns
Internal Frequency — 250 MHz
Supply Voltage (VCCINT) — 5 V
MultiVolt I/O Support — 2.5 V / 3.3 V / 5 V
Program Memory Type — EEPROM (in-system programmable)
JTAG (IEEE 1149.1) — Yes
MSL 等级 — [DATA_NEEDED: MSL level]

数据手册与资源

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