EPM7128AETC144-10N vs EPM7128ATC144-10 对比

详细并排对比 EPM7128AETC144-10N 出自 Intel 和 EPM7128ATC144-10 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM7128AETC144-10N EPM7128ATC144-10
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 有效 Obsolete
库存状态 有库存 有库存
单价(USD) $22.56 $9.10
Family MAX 7000A —
Number of Macros 128 —
Logic Gates 2,500 usable gates —
Number of I/O Pins 100 (max user I/O) —
Propagation Delay (tPD) 10 ns (grade -10) 10 ns
Internal Frequency Up to 250 MHz —
Supply Voltage (VCCINT) 3.3 V —
I/O Standards 2.5 V / 3.3 V / 5 V multiVolt —
Configuration Memory CMOS EEPROM (non-volatile) —
JTAG Support IEEE 1149.1 compliant boundary-scan —
封装 144-pin TQFP (T144) —
安装类型 Surface Mount Surface Mount
工作温度 0 C to +70 C (commercial) 0C to +70C (commercial)
RoHS 状态 [DATA_NEEDED: rohs status] unknown (legacy Altera device)
Lead-Free [DATA_NEEDED: lead-free status] —
Manufacturer — Altera (now Intel)
Series — MAX 7000A
Device Type — CPLD (Complex Programmable Logic Device)
Programmable Type — EE PLD (EEPROM-based, in-system programmable)
Macrocells — 128
Logic Array Blocks — 4
User I/O Pins — 68
Maximum Counter Frequency — 98 MHz
Supply Voltage - Internal (VCCINT) — 3.0 V to 3.6 V
I/O Voltage Levels — 5.0 V / 3.3 V / 2.5 V compatible (MultiVolt I/O)
In-System Programmability — Yes (IEEE Std 1149.1 JTAG)
封装 / 外壳 — 144-TQFP (20 x 20 mm)
Architecture — Multiple Array Matrix (MAX), 2nd generation

数据手册与资源

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