EPM7128AETI100-7N vs EPM7128ATI100-10 对比
详细并排对比 EPM7128AETI100-7N 出自 Altera 和 EPM7128ATI100-10 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Altera
EPM7128AETI100-7N - MAX 7000A CPLD 128 Macro 84 I/O | Intel/Altera
EPM7128AETI100-7N Obsolete规格对比
| 参数 | EPM7128AETI100-7N | EPM7128ATI100-10 |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | 最后采购期 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $28.50 | $13.85 |
| Series | MAX 7000A | MAX 7000A |
| Family | MAX 7000A CPLD | MAX 7000A (MAX II of MAX 7000 series) |
| Macro Cells | 128 | — |
| Number of Usable Gates | 2,500 | — |
| Number of I/O | 84 | — |
| Number of Logic Array Blocks (LABs) | 8 | 4 |
| Propagation Delay (tPD max) | 7 ns | — |
| Maximum Operating Frequency (fCNT) | 129.9 MHz | — |
| Supply Voltage (VCCINT) | 3.0 V to 3.6 V | 3.0 V to 3.6 V (3.3 V typical) |
| I/O Bank Voltage (VCCIO) | 2.5 V / 3.3 V / 5.0 V (multi-volt I/O) | — |
| Process Technology | CMOS EEPROM | CMOS EEPROM |
| 封装 | 100-pin TQFP (14x14 mm) | 100-pin TQFP (14x14 mm) |
| 安装类型 | Surface Mount | Surface Mount |
| 工作温度 | -40C to +85C (Industrial) | -40C to +85C (Industrial, 'I' suffix) |
| In-System Programmability | Yes (JTAG IEEE 1149.1) | — |
| RoHS 状态 | Compliant | Non-compliant (legacy part) |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Programmable Type | — | EE PLD (EEPROM-based, in-system programmable) |
| Number of Macrocells | — | 128 |
| Usable Gates | — | 2,500 |
| Number of I/O Pins | — | 68 |
| Propagation Delay (tPD) | — | 10 ns |
| Maximum Frequency (fMAX) | — | 87 MHz |
| I/O Standard | — | MultiVolt (2.5V / 3.3V / 5.0V tolerant) |
| Programming Interface | — | IEEE Std. 1149.1 JTAG (ISP) |