EPM7128ATC100-10 vs EPM7128ATC100-7F 对比

详细并排对比 EPM7128ATC100-10 出自 Altera 和 EPM7128ATC100-7F 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM7128ATC100-10 EPM7128ATC100-7F
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 不推荐新设计
库存状态 有库存 有库存
单价(USD) $4.95 $9.85
Product Type CPLD (Complex Programmable Logic Device) —
Family MAX 7000A MAX 7000A
Architecture Multiple Array MatriX (MAX) —
Macrocells 128 —
Logic Array Blocks (LABs) 4 8
Usable Gates 2.5K 2.5K
User I/O Pins 68 84 (per MicrochipUSA) / 100 (per MAX 7000A datasheet range)
Pin-to-Pin Logic Delay 4.5 ns —
Counter Frequency (max) 227.3 MHz —
Speed Grade -10 (10 ns) —
Core Supply Voltage 3.3 V —
I/O Logic Level Support 5.0 V / 3.3 V / 2.5 V (MultiVolt) —
Program Memory EEPROM (non-volatile) —
In-System Programmability Yes (IEEE 1149.1 JTAG) —
封装 100-pin TQFP (TC100) 100-pin TQFP (14x14 mm)
安装类型 Surface Mount Surface Mount
工作温度 0C to +70C (commercial) -40C to +85C (industrial)
RoHS 状态 [DATA_NEEDED: RoHS compliance] [DATA_NEEDED: RoHS status]
Device — EPM7128A
Logic Elements / Macrocells — 128 macrocells
Propagation Delay (tPD) — 7.5 ns
Maximum Internal Frequency (fMAX) — 116.3 MHz
Supply Voltage - Internal — 3.0 V to 3.6 V (nominal 3.3 V)
I/O Voltage — 2.5 V / 3.3 V (MultiVolt)
Programmable Type — EEPROM (in-system programmable, non-volatile)
JTAG Support — IEEE Std 1149.1 boundary-scan + ISP
Process Technology — CMOS, EEPROM configuration

数据手册与资源

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