EPM7128ATC100-10 vs EPM7128BTC100-10 对比

详细并排对比 EPM7128ATC100-10 出自 Altera 和 EPM7128BTC100-10 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Intel
EPM7128BTC100-10 EPM7128BTC100-10 - MAX 7000B CPLD, 128 Macrocells, 10ns | Intel

EPM7128BTC100-10 - MAX 7000B CPLD, 128 Macrocells, 10ns | Intel

EPM7128BTC100-10 ⚠ 最后一次采购

规格对比

参数 EPM7128ATC100-10 EPM7128BTC100-10
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 最后采购期
库存状态 有库存 有库存
单价(USD) $4.95 $11.20
Product Type CPLD (Complex Programmable Logic Device) —
Family MAX 7000A MAX 7000B
Architecture Multiple Array MatriX (MAX) —
Macrocells 128 128
Logic Array Blocks (LABs) 4 8 (16 macrocells each)
Usable Gates 2.5K 2.5K
User I/O Pins 68 —
Pin-to-Pin Logic Delay 4.5 ns —
Counter Frequency (max) 227.3 MHz —
Speed Grade -10 (10 ns) —
Core Supply Voltage 3.3 V —
I/O Logic Level Support 5.0 V / 3.3 V / 2.5 V (MultiVolt) —
Program Memory EEPROM (non-volatile) —
In-System Programmability Yes (IEEE 1149.1 JTAG) —
封装 100-pin TQFP (TC100) TQFP-100
安装类型 Surface Mount Surface Mount
工作温度 0C to +70C (commercial) 0C to +70C (commercial)
RoHS 状态 [DATA_NEEDED: RoHS compliance] Compliant (lead-free)
User I/Os — 84
Pin-to-Pin Delay (tPD) — 10 ns
Maximum Frequency (fCNT) — 125 MHz
Core Voltage (VCCINT) — 2.5 V
I/O Voltage (VCCIO) — 3.3 V (5V tolerant inputs)
Programming Interface — JTAG (IEEE 1149.1) / ISP
Technology — CMOS EEPROM

数据手册与资源

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