EPM7128ATC100-7F vs EPM7128AETC100-10N 对比

详细并排对比 EPM7128ATC100-7F 出自 Altera 和 EPM7128AETC100-10N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM7128ATC100-7F EPM7128AETC100-10N
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $9.85 $9.95
Family MAX 7000A MAX 7000AE
Device EPM7128A —
Logic Elements / Macrocells 128 macrocells —
Logic Array Blocks (LABs) 8 —
Usable Gates 2.5K 2500
User I/O Pins 84 (per MicrochipUSA) / 100 (per MAX 7000A datasheet range) —
Propagation Delay (tPD) 7.5 ns —
Maximum Internal Frequency (fMAX) 116.3 MHz —
Supply Voltage - Internal 3.0 V to 3.6 V (nominal 3.3 V) —
I/O Voltage 2.5 V / 3.3 V (MultiVolt) —
Programmable Type EEPROM (in-system programmable, non-volatile) —
JTAG Support IEEE Std 1149.1 boundary-scan + ISP —
封装 100-pin TQFP (14x14 mm) TQFP-100
工作温度 -40C to +85C (industrial) 0C to +70C (commercial)
Process Technology CMOS, EEPROM configuration CMOS EEPROM
安装类型 Surface Mount Surface Mount
RoHS 状态 [DATA_NEEDED: RoHS status] —
Series — EPM7128AE
Device Type — CPLD (Complex Programmable Logic Device)
Macrocells — 128
Logic Array Blocks — 16
User I/Os — 84
Supply Voltage (Core) — 3.3 V
I/O Tolerance — 5.0 V tolerant
Pin-to-Pin Delay (tPD) — 10 ns
Speed Grade — -10
Maximum Frequency — [DATA_NEEDED: maximum toggle frequency]
Programming — JTAG (IEEE 1149.1) ISP / EEPROM
Lead-Free / RoHS — Yes (N suffix)
Architecture — Multiple Array MatriX (MAX) - 2nd generation
PCI Compliance — Yes (33 MHz, -10 grade per PCI SIG 2.2)

数据手册与资源

浏览全部产品 创建 BOM 获取报价