EPM7128BTC144-7 vs EPM7128ATC144-10 对比

详细并排对比 EPM7128BTC144-7 出自 Altera 和 EPM7128ATC144-10 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM7128BTC144-7 EPM7128ATC144-10
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $9.85 $9.10
Family MAX 7000B —
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Macro Cells 128 —
Usable Gates 2,500 —
Logic Array Blocks (LABs) 8 —
User I/O Pins 100 (per 144-pin TQFP package) 68
Pin-to-Pin Delay (tPD) 7.5 ns —
Maximum Counter Frequency (fCNT) 126.6 MHz —
Maximum Operating Frequency 175 MHz (family typical) —
Supply Voltage (VCCINT) 2.5 V —
I/O Bank Voltage (VCCIO) 2.5 V / 3.3 V / 5.0 V (multiVolt) —
Configuration Memory EEPROM (non-volatile, ISP) —
Programmability IEEE 1149.1 JTAG (ISP) —
Operating Temperature (Commercial) 0C to +90C —
封装 144-pin TQFP —
安装类型 Surface Mount Surface Mount
RoHS 状态 [DATA_NEEDED: RoHS status] unknown (legacy Altera device)
Lead-Free [DATA_NEEDED: lead-free status] —
Manufacturer — Altera (now Intel)
Series — MAX 7000A
Programmable Type — EE PLD (EEPROM-based, in-system programmable)
Macrocells — 128
Logic Array Blocks — 4
Propagation Delay (tPD) — 10 ns
Maximum Counter Frequency — 98 MHz
Supply Voltage - Internal (VCCINT) — 3.0 V to 3.6 V
I/O Voltage Levels — 5.0 V / 3.3 V / 2.5 V compatible (MultiVolt I/O)
In-System Programmability — Yes (IEEE Std 1149.1 JTAG)
工作温度 — 0C to +70C (commercial)
封装 / 外壳 — 144-TQFP (20 x 20 mm)
Architecture — Multiple Array Matrix (MAX), 2nd generation

数据手册与资源

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