EPM7128SLC84-6N vs EPM7128ELI84-20 对比

详细并排对比 EPM7128SLC84-6N 出自 Intel 和 EPM7128ELI84-20 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Intel
EPM7128SLC84-6N EPM7128SLC84-6N - MAX 7000S CPLD, 128 Macro, 6ns, 84-PLCC | Intel

EPM7128SLC84-6N - MAX 7000S CPLD, 128 Macro, 6ns, 84-PLCC | Intel

EPM7128SLC84-6N ⚠ 最后一次采购
Intel
EPM7128ELI84-20 EPM7128ELI84-20 - 128-Macrocell CPLD, 20ns, 84-PLCC | Intel / Altera

EPM7128ELI84-20 - 128-Macrocell CPLD, 20ns, 84-PLCC | Intel / Altera

EPM7128ELI84-20 ⚠ 最后一次采购

规格对比

参数 EPM7128SLC84-6N EPM7128ELI84-20
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 最后采购期 最后采购期
库存状态 有库存 有库存
单价(USD) $8.75 $7.95
Family MAX 7000S MAX 7000 (Classic / MAX 7000B/E)
Device System Gates 2500 —
Number of Macro Cells 128 —
Number of User I/Os 68 —
Number of Logic Blocks/Elements 8 —
Number of Global Clocks 2 —
Product Terms per Macro Cell 32 —
Maximum Operating Frequency 147.1 MHz —
Pin-to-Pin Delay (Speed Grade) 6 ns —
电源电压 5 V —
Process Technology CMOS, EEPROM —
Program Memory Type EEPROM —
In-System Programmability Yes (ISP via JTAG) —
封装 84-pin PLCC (J-lead) 84-pin PLCC (J-Lead)
工作温度 [DATA_NEEDED: operating temperature range] -40 °C to +85 °C (Industrial)
RoHS 状态 Non-Compliant (legacy 5V part) Compliant (lead-free PLCC variant)
Device Name — EPM7128E
Macro Cells — 128
Usable Gates — 2,500
Logic Array Blocks (LABs) — 8
Maximum User I/Os — 68
Pin-to-Pin Delay (tPD) — 20 ns
Maximum Operating Frequency (fCNT) — 62.5 MHz
Supply Voltage (VCCINT) — 5 V (4.75 V to 5.25 V for -20 speed grade)
Programming Interface — JTAG (IEEE 1149.1) + ISP
Technology — EEPROM-based CMOS
安装类型 — Surface Mount / Socketable (PLCC J-Lead)

数据手册与资源

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