EPM7128SQC100-10 vs EPM7128SQC100-7F 对比

详细并排对比 EPM7128SQC100-10 出自 Altera 和 EPM7128SQC100-7F 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM7128SQC100-10 EPM7128SQC100-7F
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $9.85 $9.75
Family MAX 7000S MAX 7000S
Device Type CPLD (Complex Programmable Logic Device) —
Macro Cells 128 —
Logic Elements / Gates 2,500 usable gates —
Maximum User I/O 84 —
Logic Array Blocks (LABs) 16 —
Maximum Operating Frequency 100 MHz 125 MHz
Pin-to-Pin Logic Delay (tPD) 10 ns —
电源电压 5 V —
Process Technology 5V CMOS, EEPROM-based —
Programmability In-System Programmable (ISP) via JTAG —
封装 100-pin PQFP (Plastic Quad Flat Pack) 100-pin PQFP (SQC100), surface-mount
工作温度 0C to +70C (commercial) 0 °C to 70 °C (Commercial)
安装类型 Surface Mount Surface Mount
RoHS 状态 [DATA_NEEDED: rohs_status] [DATA_NEEDED: confirmed from manufacturer]
Logic Elements / Blocks — 8 LABs
Number of Macrocells — 128
Number of Usable Gates — 2,500
Pin-to-Pin Delay (tPD) — 7.5 ns
Number of User I/O — 84
Supply Voltage (VCCINT) — 4.75 V to 5.25 V (5 V nominal)
Programmable Type — In-System Programmable (ISP), EEPROM
JTAG Boundary-Scan — Yes (IEEE 1149.1 BST)
Open-Drain Output Option — Yes
Lead-Free (Pb-Free) — Yes (matte-tin, '-F' suffix)
存储器类型 — Non-volatile (EEPROM configuration)

数据手册与资源

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