EPM7128SQC160-10 vs EPM7128SQC160-15 对比

详细并排对比 EPM7128SQC160-10 出自 Altera 和 EPM7128SQC160-15 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM7128SQC160-10 EPM7128SQC160-15
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $14.20 $9.95
Family MAX 7000 —
Series MAX 7000S MAX 7000
Macro Cells 128 —
Usable Gates 2,500 —
Logic Array Blocks (LABs) 8 —
User I/O Pins 100 —
Maximum Operating Frequency 100 MHz 125 MHz (internal feedback)
Pin-to-Pin Propagation Delay (tPD) 10 ns —
Supply Voltage (VCCINT) 5 V —
I/O Supply Voltage (VCCIO) 3.3 V or 5 V —
Configuration Memory Non-volatile EEPROM EEPROM (non-volatile, ~100 erase/program cycles)
Programming Interface JTAG (IEEE 1149.1) / ByteBlaster IEEE 1149.1 JTAG
封装 160-pin PQFP —
Lead Pitch 0.65 mm —
工作温度 0C to +70C (commercial) 0C to +70C (commercial grade)
安装类型 Surface Mount Surface Mount
Compliance RoHS - see notes —
Programmable Type — In-System Programmable (EEPROM)
Number of Macrocells — 128
Number of Logic Elements/Blocks — 8 (LABs of 16 macrocells each)
Number of Usable Gates — 2,500
Number of I/O — 100
Propagation Delay (tpd) — 15 ns max
Logic Element Propagation Delay — 4.5 ns
Supply Voltage (VCC) — 4.75 V to 5.25 V
Logic Family — CMOS
封装 / 外壳 — 160-BQFP (160-PQFP, 28x28 mm)
RoHS 状态 — [DATA_NEEDED: RoHS compliance]
Product Status — Obsolete (per distributor listings)

数据手册与资源

浏览全部产品 创建 BOM 获取报价