EPM7128SQI100-15N vs EPM7128SQC100-15 对比

详细并排对比 EPM7128SQI100-15N 出自 Intel 和 EPM7128SQC100-15 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Altera
EPM7128SQC100-15 EPM7128SQC100-15 - MAX 7000 CPLD 128MC 15ns 5V | Altera/Intel

EPM7128SQC100-15 - MAX 7000 CPLD 128MC 15ns 5V | Altera/Intel

EPM7128SQC100-15 ⚠ 最后一次采购

规格对比

参数 EPM7128SQI100-15N EPM7128SQC100-15
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 有效 最后采购期
库存状态 有库存 有库存
单价(USD) $4.85 $8.20
Family MAX 7000S MAX 7000
Device Type EE-PLD / CPLD CPLD (Complex Programmable Logic Device)
Macrocells 128 128
User I/Os 80 84
Usable Gates 2,500 (typical) —
Propagation Delay (tPD) 15 ns —
Maximum Frequency (fCNT) 76.9 MHz —
Core Supply Voltage (VCCINT) 4.5 V to 5.5 V —
I/O Logic Levels 3.3 V or 5 V (multi-volt I/O) —
Operating Temperature Grade Industrial (-40C to +85C) —
封装 PQFP-100 (R-PQFP-G100) 100-pin PQFP (Plastic Quad Flat Pack)
Terminal Form Gull Wing —
Package Code QFP —
安装类型 Surface Mount Surface Mount
Process Technology CMOS —
In-System Programmability Yes (IEEE 1149.1 JTAG) —
Non-volatile Configuration EEPROM (instant-on) —
RoHS 状态 Lead-free (N suffix) Non-compliant (SnPb lead finish - legacy PQFP)
Logic Array Blocks (LABs) — 4 (16 macrocells each)
Pin-to-Pin Delay (tPD) — 15 ns
Maximum Frequency (fMAX) — [DATA_NEEDED: fMAX value]
Typical Gate Count — 2,500 gates
Supply Voltage (VCCINT) — 5 V (5% tolerance)
Programming Technology — EEPROM (in-system programmable via JTAG)
JTAG Interface — IEEE Std. 1149.1 compliant
工作温度 — 0C to +70C (Commercial)
MSL 等级 — 3 (168 hours)

数据手册与资源

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