EPM7160ELC84-20 vs EPM7160SLC84-10N 对比

详细并排对比 EPM7160ELC84-20 出自 Intel 和 EPM7160SLC84-10N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM7160ELC84-20 EPM7160SLC84-10N
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $16.95 $9.85
Family MAX 7000 MAX 7000S
Macrocells 160 —
Logic Array Blocks 4 —
Usable Gates 3,200 3,200 gates
User I/O Pins 64 64 (also reported as 60 or 36 depending on variant)
Pin-to-Pin Delay (tPD) 20 ns 10 ns
Supply Voltage (VCC) 5.0 V —
Operating Temperature (Commercial) 0C to +70C —
Programming Interface IEEE 1149.1 JTAG (ISP) —
In-System Programmable Yes (5.0-V ISP) —
封装 PLCC-84 (windowed ceramic carrier not applicable - plastic) 84-pin PLCC (J-lead, surface mount)
Technology CMOS EEPROM —
Architecture Second-generation MAX —
安装类型 Surface Mount (PLCC socket compatible) Surface Mount
RoHS 状态 [DATA_NEEDED: RoHS compliance per specific part marking] —
Global Clock Inputs 4 —
Logic Element Type EEPROM-based macrocell —
Logic Elements / Macrocells — 160 macrocells
Logic Array Blocks (LABs) — 4
Counter Speed (fCNT) — up to 175.4 MHz
Maximum Operating Frequency — 100 MHz
Supply Voltage - Core (VCC) — 5.0 V
I/O Supply Voltage (VCCIO) — 3.3 V or 5.0 V
Configuration Memory — EEPROM (non-volatile)
In-System Programming — Yes, via IEEE Std. 1149.1 JTAG
Program / Erase Cycles — 100 minimum
Data Retention — 20 years minimum
Operating Temperature Grade — Commercial (0C to +70C)
Lead-Free / RoHS — Yes (-N suffix indicates lead-free)

数据手册与资源

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