EPM7160SLC84-10N vs EPM7160ELC84-15 对比

详细并排对比 EPM7160SLC84-10N 出自 Intel 和 EPM7160ELC84-15 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM7160SLC84-10N EPM7160ELC84-15
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $9.85 $5.95
Family MAX 7000S MAX 7000
Logic Elements / Macrocells 160 macrocells —
Usable Gates 3,200 gates 3,200
Logic Array Blocks (LABs) 4 —
User I/O Pins 64 (also reported as 60 or 36 depending on variant) —
Pin-to-Pin Delay (tPD) 10 ns —
Counter Speed (fCNT) up to 175.4 MHz —
Maximum Operating Frequency 100 MHz —
Supply Voltage - Core (VCC) 5.0 V —
I/O Supply Voltage (VCCIO) 3.3 V or 5.0 V —
Configuration Memory EEPROM (non-volatile) —
In-System Programming Yes, via IEEE Std. 1149.1 JTAG —
Program / Erase Cycles 100 minimum —
Data Retention 20 years minimum —
封装 84-pin PLCC (J-lead, surface mount) —
Operating Temperature Grade Commercial (0C to +70C) —
Lead-Free / RoHS Yes (-N suffix indicates lead-free) —
安装类型 Surface Mount Surface Mount (PLCC socket compatible)
Product Type — CPLD - Complex Programmable Logic Device
Architecture — EEPROM-based, second-generation MAX
Macrocells — 160
Logic Array Blocks — 4
Maximum I/O Pins — 36
Pin-to-Pin Delay — 15 ns
Counter Frequency — 76.9 MHz
Supply Voltage (Vcc) — 5 V
In-System Programmability — Yes (IEEE 1149.1 JTAG)
Package Type — 84-pin PLCC (J-Lead)
工作温度 — 0 C to +70 C (commercial)
RoHS 状态 — Contains lead / RoHS non-compliant (per Altera listing)

数据手册与资源

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