EPM7160STI100-10N vs EPM7160STC100-6N 对比

详细并排对比 EPM7160STI100-10N 出自 Altera 和 EPM7160STC100-6N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM7160STI100-10N EPM7160STC100-6N
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 最后采购期 Obsolete
库存状态 有库存 有库存
单价(USD) $7.80 $14.20
Family MAX 7000S MAX 7000S
Device Type CPLD (Complex Programmable Logic Device) —
Macrocells 160 —
Usable Gates 3200 —
User I/Os 84 (per Mouser listing; up to 104 per alternate datasheets) 84
Logic Blocks 10 (LABs) —
Propagation Delay (tPD) 10 ns 6 ns
Internal Frequency 100 MHz 149.3 MHz (max)
Supply Voltage VCC 5.0 V (3.3 V or 5 V tolerant I/O via MAX 7000S multi-voltage ISP) —
Programmable Technology EEPROM (non-volatile) —
In-System Programmability Yes (JTAG/IEEE 1149.1, 5.0V ISP) Yes (IEEE 1149.1 JTAG)
工作温度 -40C to +85C (industrial, 'I' suffix) 0 °C to +70 °C (Commercial)
Package Type 100-pin TQFP (TQFP-100) —
安装类型 Surface Mount —
Lead-Free / RoHS Yes (lead-free per 'I' industrial suffix) —
Process Technology CMOS, EEPROM-based —
Logic Type — CPLD (Complex Programmable Logic Device)
Macro Cells — 160
Gates (typical) — 3,200
电源电压 — 5 V
Program Memory Type — EEPROM (non-volatile)
封装 — TQFP-100 (T100)
Package Code — LFQFP, S Gull-Wing
Logic Family — CMOS
I/O Banks — [DATA_NEEDED: I/O bank count]
RoHS 状态 — [DATA_NEEDED: RoHS compliance]
Lead-Free — [DATA_NEEDED: lead-free status]

数据手册与资源

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