EPM7192SQC160-10N vs EPM7192EQC160-20 对比
详细并排对比 EPM7192SQC160-10N 出自 Altera 和 EPM7192EQC160-20 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Altera
EPM7192SQC160-10N - 192-Macrocell MAX 7000S CPLD, 10ns, 160-Pin PQFP | Altera
EPM7192SQC160-10N NrndIntel
EPM7192EQC160-20 - 192-Macrocell MAX 7000 CPLD, 20ns, PQFP-160 | Intel
EPM7192EQC160-20 Obsolete规格对比
| 参数 | EPM7192SQC160-10N | EPM7192EQC160-20 |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $9.95 | $58.26 |
| Series | MAX 7000S | MAX 7000 |
| Family | MAX 7000 | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 192 | — |
| Logic Array Blocks (LABs) | 12 | — |
| Usable Gates | 3,750 | — |
| User I/O Pins | 124 | — |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| Maximum Operating Frequency | 100 MHz | — |
| Supply Voltage (VCCINT) | 5.0 V | 4.75 V to 5.25 V |
| Process Technology | 0.30 µm CMOS EEPROM | — |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | — |
| 封装 / 外壳 | 160-BQFP (PQFP, 0.65 mm pitch) | 160-BQFP / 160-PQFP (28x28 mm) |
| 安装类型 | Surface Mount | Surface Mount |
| 工作温度 | [DATA_NEEDED: commercial/industrial grade] | -40C to +85C (industrial) |
| RoHS 状态 | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status - non-RoHS era part] |
| Programmable Type | — | EE PLD (EEPROM-based) |
| Number of Macrocells | — | 192 |
| Number of Logic Array Blocks | — | 4 |
| Number of User I/O Pins | — | 124 (per package), 36 (per data source variant description) |
| Delay Time (tPD) | — | 20 ns |
| Internal Counter Frequency (fCNT) | — | 100 MHz typical |
| In-System Programmable (ISP) | — | Yes, 5.0 V ISP via JTAG (IEEE Std. 1149.1) |
| Programmable Security Bit | — | Yes |
| Power-Saving Mode | — | Yes, programmable per macrocell |
| MSL 等级 | — | [DATA_NEEDED: MSL rating] |