EPM7192SQC160-15 vs EPM7192SQC160-10N 对比
详细并排对比 EPM7192SQC160-15 出自 Altera 和 EPM7192SQC160-10N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Altera
EPM7192SQC160-10N - 192-Macrocell MAX 7000S CPLD, 10ns, 160-Pin PQFP | Altera
EPM7192SQC160-10N Nrnd规格对比
| 参数 | EPM7192SQC160-15 | EPM7192SQC160-10N |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $8.75 | $9.95 |
| Family | MAX 7000S | MAX 7000 |
| Device Type | CPLD - Complex Programmable Logic Device | CPLD (Complex Programmable Logic Device) |
| Number of Macrocells | 192 | — |
| Number of Logic Array Blocks | 4 | — |
| Number of Usable Gates | 3750 | — |
| User I/O Pins | 124 | 124 |
| Pin-to-Pin Logic Delay (tPD) | 15 ns | — |
| Maximum Operating Frequency | 76.9 MHz | 100 MHz |
| 电源电压 | 5.0 V | — |
| Programmability | In-System (ISP) via JTAG IEEE Std 1149.1 | — |
| Configuration Memory | EEPROM, non-volatile | — |
| 封装 | PQFP-160 | — |
| 安装类型 | Surface Mount | Surface Mount |
| 工作温度范围 | [DATA_NEEDED: operating temperature range] | — |
| Process Technology | CMOS, EEPROM-based | 0.30 µm CMOS EEPROM |
| Series | — | MAX 7000S |
| Macrocells | — | 192 |
| Logic Array Blocks (LABs) | — | 12 |
| Usable Gates | — | 3,750 |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Supply Voltage (VCCINT) | — | 5.0 V |
| In-System Programmability | — | Yes (IEEE 1149.1 JTAG) |
| 封装 / 外壳 | — | 160-BQFP (PQFP, 0.65 mm pitch) |
| 工作温度 | — | [DATA_NEEDED: commercial/industrial grade] |
| RoHS 状态 | — | [DATA_NEEDED: RoHS compliance status] |