EPM7256AEFC100-10N vs EPM7256AETC100-5N 对比

详细并排对比 EPM7256AEFC100-10N 出自 Altera 和 EPM7256AETC100-5N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Altera
EPM7256AETC100-5N EPM7256AETC100-5N - 256-Macro MAX 7000A CPLD, 5ns TQFP-100

EPM7256AETC100-5N - 256-Macro MAX 7000A CPLD, 5ns TQFP-100

EPM7256AETC100-5N ⚠ 最后一次采购

规格对比

参数 EPM7256AEFC100-10N EPM7256AETC100-5N
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 最后采购期
库存状态 有库存 有库存
单价(USD) $24.50 $9.75
Manufacturer Altera (now Intel) —
Series MAX 7000A MAX 7000AE
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Macrocells 256 —
Logic Array Blocks (LABs) 16 16
User I/O 84 —
Number of Gates 5000 —
Propagation Delay (tPD) 10 ns —
Maximum Frequency (fMAX) 154.8 MHz —
Supply Voltage (VCCINT) 3.3 V 3.3 V
I/O Tolerance 5 V tolerant (multiVolt I/O) —
Programmability EEPROM, In-System Programmable (JTAG IEEE 1149.1) —
封装 100-LBGA (11 x 11 mm), FineLine BGA TQFP-100 (1.0 mm pitch, 14x14 mm)
安装类型 Surface Mount Surface Mount
工作温度 0°C to +70°C (commercial) 0C to +70C (Commercial)
RoHS 状态 [DATA_NEEDED: RoHS status] Compliant (lead-free)
Process Technology 0.30 µm EEPROM CMOS CMOS, EEPROM-based
Family — MAX 7000A
Macro Cells — 256
Usable Gates — 5000 (range 600 to 10000)
User I/Os — 84
Pin-to-Pin Delay (tPD) — 5.0 ns
Counter Frequency (fCNT) — up to 227.3 MHz
MultiVolt I/O Support — 2.5 V / 3.3 V / 5.0 V
Program Memory — Internal EEPROM
In-System Programmability — Yes (IEEE 1149.1 JTAG)
MSL 等级 — 3 (168 hours)
Security Bit — Programmable

数据手册与资源

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