EPM7256AEFI100-7 vs EPM7256AEFC100-10N 对比
详细并排对比 EPM7256AEFI100-7 出自 Intel 和 EPM7256AEFC100-10N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Altera
EPM7256AEFC100-10N - MAX 7000 CPLD, 256 Macro, 10ns, 100-FBGA | Altera
EPM7256AEFC100-10N Nrnd规格对比
| 参数 | EPM7256AEFI100-7 | EPM7256AEFC100-10N |
|---|---|---|
| 品牌 | Intel | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $65.40 | $24.50 |
| Logic Family | MAX 7000A | — |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Number of Macrocells | 256 | — |
| Number of Usable Gates | 5K | — |
| Number of User I/O | 84 | — |
| Pin-to-Pin Delay (Speed Grade) | 7.5 ns | — |
| Maximum Operating Frequency | 126.6 MHz | — |
| Core Supply Voltage | 3.3 V | — |
| MultiVolt I/O Support | 2.5 V / 3.3 V / 5.0 V | — |
| Programmability | In-system programmable (ISP) via JTAG | EEPROM, In-System Programmable (JTAG IEEE 1149.1) |
| 封装 | 100-ball FBGA (FineLine BGA), 11x11 mm | 100-LBGA (11 x 11 mm), FineLine BGA |
| Operating Temperature Range (Industrial) | -40 C to +85 C | — |
| JTAG / Boundary Scan | IEEE 1149.1 compliant | — |
| 安装类型 | Surface Mount | Surface Mount |
| RoHS 状态 | Not Compliant (per Arrow listing) | [DATA_NEEDED: RoHS status] |
| Manufacturer | — | Altera (now Intel) |
| Series | — | MAX 7000A |
| Macrocells | — | 256 |
| Logic Array Blocks (LABs) | — | 16 |
| User I/O | — | 84 |
| Number of Gates | — | 5000 |
| Propagation Delay (tPD) | — | 10 ns |
| Maximum Frequency (fMAX) | — | 154.8 MHz |
| Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Tolerance | — | 5 V tolerant (multiVolt I/O) |
| 工作温度 | — | 0°C to +70°C (commercial) |
| Process Technology | — | 0.30 µm EEPROM CMOS |