EPM7256AEQI208-7N vs EPM7256AEQC208-5N 对比
详细并排对比 EPM7256AEQI208-7N 出自 Altera 和 EPM7256AEQC208-5N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM7256AEQI208-7N | EPM7256AEQC208-5N |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $0.00 | $11.50 |
| Family | MAX 7000A | MAX 7000A |
| Macrocells | 256 | 256 |
| Usable Gates | 5,000 | 5,000 |
| User I/O Pins | 164 | — |
| Logic Array Blocks | 16 | — |
| Pin-to-Pin Propagation Delay (tPD) | 7.5 ns | 5.5 ns |
| Maximum Internal Frequency | 126.6 MHz | 172.4 MHz |
| 电源电压 | 3.3 V | — |
| Configuration Technology | EEPROM (non-volatile) | — |
| 封装 | 208-pin PQFP (FQFP) | 208-pin PQFP (Plastic Quad Flat Pack) |
| Number of Terminals | 208 | — |
| Terminal Form | Gull Wing | — |
| Package Shape | Square | — |
| 安装类型 | Surface Mount | Surface Mount |
| Operating Temperature Grade | Industrial | — |
| Speed Grade | -7 | -5 |
| RoHS 状态 | Compliant (N suffix) | unknown |
| Lead Finish | [DATA_NEEDED: lead finish] | — |
| Logic Family / Base Technology | — | CMOS, EEPROM-based |
| User I/Os | — | 164 |
| Dedicated Inputs | — | 16 |
| 引脚数 | — | 208 |
| Supply Voltage (VCCINT) | — | 3.3 V |
| 工作温度 | — | 0 C to +70 C (Commercial) |
| Programming Interface | — | JTAG (IEEE Std. 1149.1) / ISP |
| MSL 等级 | — | [DATA_NEEDED: MSL Level] |