EPM7256AETC100-5N vs EPM7128AETC100-5N 对比
详细并排对比 EPM7256AETC100-5N 出自 Altera 和 EPM7128AETC100-5N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Intel
EPM7128AETC100-5N - 128-Macrocell MAX 7000A CPLD, 5ns | Intel / Altera
EPM7128AETC100-5N ✓ 量产中规格对比
| 参数 | EPM7256AETC100-5N | EPM7128AETC100-5N |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 最后采购期 | 有效 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $9.75 | $6.85 |
| Family | MAX 7000A | MAX 7000A |
| Series | MAX 7000AE | — |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD - Complex Programmable Logic Device |
| Macro Cells | 256 | — |
| Usable Gates | 5000 (range 600 to 10000) | — |
| User I/Os | 84 | 84 |
| Logic Array Blocks (LABs) | 16 | — |
| Pin-to-Pin Delay (tPD) | 5.0 ns | — |
| Counter Frequency (fCNT) | up to 227.3 MHz | — |
| Supply Voltage (VCCINT) | 3.3 V | — |
| MultiVolt I/O Support | 2.5 V / 3.3 V / 5.0 V | — |
| 封装 | TQFP-100 (1.0 mm pitch, 14x14 mm) | 100-pin TQFP |
| 安装类型 | Surface Mount | Surface Mount |
| 工作温度 | 0C to +70C (Commercial) | 0C to +70C (commercial) |
| Program Memory | Internal EEPROM | — |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | — |
| RoHS 状态 | Compliant (lead-free) | Compliant |
| MSL 等级 | 3 (168 hours) | — |
| Process Technology | CMOS, EEPROM-based | — |
| Security Bit | Programmable | — |
| Macrocells | — | 128 |
| Logic Gates (typical) | — | 2,500 |
| Pin-to-Pin Logic Delay (tPD) | — | 5 ns |
| Maximum Operating Frequency | — | 192.3 MHz |
| Core Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Bank Supply Voltage (VCCIO) | — | 3.3 V or 2.5 V |
| 5V Tolerant Inputs | — | Yes (when VCCIO = 3.3 V) |
| Programmable Logic Type | — | EEPROM-based, in-system programmable |
| Programming Interface | — | JTAG (IEEE Std. 1149.1) |