EPM7256AETC144-10N vs EPM7256AETI144-7 对比
详细并排对比 EPM7256AETC144-10N 出自 Intel 和 EPM7256AETI144-7 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Intel
EPM7256AETC144-10N - MAX 7000A 256-Macro CPLD, 10ns TQFP-144 | Intel
EPM7256AETC144-10N Obsolete规格对比
| 参数 | EPM7256AETC144-10N | EPM7256AETI144-7 |
|---|---|---|
| 品牌 | Intel | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $15.95 | $53.55 |
| Family | MAX 7000A | MAX 7000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Usable Gates | 5,000 | 5,000 |
| Macro Cells | 256 | — |
| Logic Array Blocks | 16 | — |
| Maximum User I/O Pins | 120 (in 144-pin TQFP) | — |
| Pin-to-Pin Propagation Delay (tPD) | 10 ns | — |
| Maximum Internal Frequency | 95.2 MHz | — |
| Supply Voltage (Core) | 3.3 V | 3.3 V |
| I/O Voltage Tolerance | 5 V-tolerant | — |
| Configuration Memory | EEPROM (non-volatile, in-system programmable) | Non-volatile EEPROM (instant-on, no boot PROM) |
| Programming Interface | IEEE 1149.1 JTAG (ISP) | IEEE 1149.1 (JTAG) / ByteBlaster |
| 封装 | TQFP-144 (ETC suffix) | TQFP-144 (20x20 mm, 0.5 mm pitch) |
| 安装类型 | Surface Mount | Surface Mount |
| 工作温度 | -40C to +85C (industrial) | -40C to +85C (Industrial) |
| Technology | CMOS, EEPROM-based | — |
| Pin Compatibility | Pin-compatible with 5.0V MAX 7000S family | — |
| RoHS 状态 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: rohs status] |
| Macrocells | — | 256 |
| User I/Os | — | 36 |
| Logic Array Blocks (LABs) | — | 16 |
| Pin-to-Pin Delay (tPD) | — | 7 ns |
| Maximum Frequency (fMAX) | — | 126.6 MHz |
| I/O Standard Support | — | MultiVolt (2.5 V / 3.3 V / 5 V) |